Semiconductor devices are required to be compact and sophisticated. A multi-chip package (MCP), which mounts a plurality of semiconductor chips on a substrate, is known as a semiconductor device that satisfies such requirements.
In such a semiconductor device, a heat dissipation component (e.g., metal heat dissipation plate) is arranged on a semiconductor chip to dissipate the heat generated from the semiconductor chip into the environment. This layout ensures and increases the transfer of heat from the semiconductor chip to the exterior of the semiconductor device. A thermal conduction member (thermal interface material: TIM) is arranged between the semiconductor chip and the heat dissipation plate. The thermal conduction member compensates for unevenness in the surfaces of the semiconductor chip and the heat dissipation plate, while decreasing the contact thermal resistance. This smoothly transfers heat from the semiconductor chip to the heat dissipation plate.
FIG. 10 illustrates a prior art example of a semiconductor device 3 that uses a heat dissipation plate. The semiconductor device 3 includes a wiring substrate 60. A first chip 61 and a second chip 62 are arranged next to each other on the wiring substrate 60. The heat dissipation plate 63 is shared by and attached to the first chip 61 and the second chip 62. A thermal conduction member 64 is arranged between the upper surface of the first chip 61 and the lower surface of the heat dissipation plate 63 and between the upper surface of the second chip 62 and the lower surface of the heat dissipation plate 63.
The first chip 61 and second chip 62 generate heat. The thermal conduction member 64 conducts the heat to the heat dissipation plate 63. This suppresses increases in the temperature of the first chip 61 and the second chip 62.
Prior art examples are described in Japanese Laid-Open Patent Publication Nos. 2004-172489 and 2009-43978.
In the semiconductor device 3, a semiconductor element such as a logic element, which has a large thermal resistance and generates a large amount of heat, may be formed on the first chip 61. Further, a semiconductor element such as a memory, which has a small thermal resistance and is vulnerable to heat, may be formed on the second chip 62. In this case, a logic chip, which generates a large amount of heat, is arranged together with a memory chip, which is vulnerable to heat. As described above, the heat generated by the first chip 61 and the second chip 62 is conducted to the same heat dissipation plate 63. The heat dissipation plate 63 conducts the heat generated by the semiconductor chip that generates a large amount of heat (i.e., the first chip 61) to the semiconductor chip that is vulnerable to heat (i.e., second chip 62). When the heat conduction increases the temperature of the second chip 62 to an excessively high temperature, the second chip 62 may fail to function normally. Accordingly, the reliability of the prior art semiconductor device 3 with respect to heat is relatively low.